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AI in the Cloud Tuesday, November 18, 2025 UC Berkeley Berkeley, CA 8:30AM – 4PM PDT |
The IAP UC Berkeley Workshop on the Future of AI in the Cloud is Scheduled for Tuesday, November 18, 2025 on the Berkeley Campus.
This is an In-person Workshop with no Live-streaming.
Time: 8:30am - 4:00pm PST - Advance Registration is Required - Please Apply Here.
Venue: Wozniak Longe, Soda Hall, UC Berkeley, Berkeley, CA
This workshop is hosted and co-organized by Prof. Sagar Karandikar and the IAP.
This is an In-person Workshop with no Live-streaming.
Time: 8:30am - 4:00pm PST - Advance Registration is Required - Please Apply Here.
Venue: Wozniak Longe, Soda Hall, UC Berkeley, Berkeley, CA
This workshop is hosted and co-organized by Prof. Sagar Karandikar and the IAP.
Prof. Sagar Karandikar is host and co-organizer with the IAP of the 2025 Berkeley AI in the Cloud Workshop. Dr. Karandikar is an Assistant Professor of EECS
at UC Berkeley and the Jean and Hing Wong Foundation Faculty Fellow.
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Prof. David Patterson will keynote the morning session. Dr. Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, and 2017 ACM Turing Award Laureate. He is a member of the National Academy of Engineering, the National Academy of Sciences, and the American Academy of Arts and Sciences.
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Prof. Ion Stoica will keynote the afternoon session. Dr. Stoica is the Xu Bao Chancellor's Chair Professor at the University of California at Berkeley. He is a Member of National Academy of Engineering, an Honorary Member of the Romanian Academy and an ACM Fellow.
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Participants will include faculty, postdocs, students, industry scientists and engineers. The student poster session conducted during the break at lunch is open to any student. The Best Poster Award is $300.
AGENDA – Please see the Speaker Abstracts and Bios below, along with Testimonials from previous Workshops.
8:30-8:55 – Badge Pick-up – Coffee/Tea and Breakfast Food/Snacks
8:55-9:00 – Welcome – Prof. Sagar Karandikar, UC Berkeley
9:00-9:45 – KEYNOTE: Prof. Dave Patterson, UC Berkeley and Google, the Pardee Professor of Computer Science, Emeritus, "How to Give AI a Bad Carbon Footprint"
9:45-10:15 – Dr. Bilge Acun, Research Scientist, FAIR / Meta Superintelligence Labs, “CATransformers: Carbon Aware Transformers Through Joint Model-Hardware Optimization”
10:15-10:45 – Ralph Wittig, Head of Research & Advanced Development, AMD, "Accelerating the Future: AI, Compute and Innovation at Scale"
10:45-11:15 – Prof. Sagar Karandikar, UC Berkeley, “Agile Hardware/Software Co-Design for Hyperscale Cloud Systems”
11:15-11:30 – Lightning Session for Student Posters
11:30-12:30 – Lunch and Poster Viewing
12:30-1:15 – KEYNOTE: Prof. Ion Stoica, UC Berkeley, the Xu Bao Chancellor's Chair Professor, "An AI Stack: from Scaling AI Workloads to Evaluating LLMs"
1:15-1:45 – Dr. Erich Haratsch, Senior Director of Architecture, Marvell, “Data Storage Innovations for Scalable AI Infrastructure”
1:45-2:15 – Prof. Sophia Shao, UC Berkeley, “From Algorithms to Silicon: Accelerating Full-Stack Co-Design for the AI Era”
2:15-2:45 – Dr. Liguang Xie, Engineering Director of Global Compute Infrastructure, ByteDance, “Unifying Compute and Data for Generative AI: AIBrix, DPUs, and the Future of GenAI Inference”
2:45-3:15 – Prof. Natacha Crooks, UC Berkeley, “Supporting Our AI Overlords: Redesigning Data Systems to be Agent-First”
3:15-4:00 - Best Poster Award and Networking Reception
ABSTRACTS and BIOS (alphabetical order by last name)
Dr. Bilge Acun, FAIR @ Meta, “CATransformers: Carbon Aware Transformers Through Joint Model-Hardware Optimization”
Abstract: Machine learning solutions are rapidly adopted to enable a variety of key use cases, from conversational AI assistants to scientific discovery. This growing adoption is expected to increase the associated lifecycle carbon footprint, including both \emph{operational carbon} from training and inference and \emph{embodied carbon} from AI hardware manufacturing. We introduce \ourframework -- the first carbon-aware co-optimization framework for Transformer-based models and hardware accelerators. By integrating both operational and embodied carbon into early-stage design space exploration, \ourframework enables sustainability-driven model architecture and hardware accelerator co-design that reveals fundamentally different trade-offs than latency- or energy-centric approaches. Evaluated across a range of Transformer models, \ourframework consistently demonstrates the potential to reduce total carbon emissions -- by up to 30\% -- while maintaining accuracy and latency. We further highlight its extensibility through a focused case study on multi-modal models. Our results emphasize the need for holistic optimization methods that prioritize carbon efficiency without compromising model capability and execution time performance. The source code of \ourframework is available at {\small{\href{this https URL}{\texttt{this https URL}}}}.
Bio: Bilge Acun is a Research Scientist at FAIR / Meta Superintelligence Labs. She is working on making large scale machine learning systems more efficient, high performance and sustainable through algorithmic and system optimizations. She received her Ph.D. degree in 2017 at the Department of Computer Science at University of Illinois at Urbana-Champaign. Her dissertation was awarded 2018 ACM SigHPC Dissertation Award Honorable Mention. Before joining FAIR, she worked at the IBM Thomas J. Watson Research Center as a Research Staff Member.
Prof. Natacha Crooks, UC Berkeley, “Supporting Our AI Overlords: Redesigning Data Systems to be Agent-First”
Abstract: Large Language Model (LLM) agents, acting on their users' behalf to manipulate and analyze data, are likely to become the dominant workload for data systems in the future. When working with data, agents employ a high-throughput process of exploration and solution formulation for the given task, one we call agentic speculation. The sheer volume and inefficiencies of agentic speculation can pose challenges for present-day data systems. I will argue that data systems need to adapt to more natively support agentic workloads. I will take advantage of the characteristics of agentic speculation that we identify, i.e., scale, heterogeneity, redundancy, and steerability - to outline a number of new research opportunities for a new agent-first data systems architecture, ranging from new query interfaces, to new query processing techniques, to new agentic memory store
Bio: Natacha Crooks is an Assistant Professor at UC Berkeley. She works at the intersection of distributed systems and databases. Most recently, she is focused on developing scalable database and storage systems with strong scaling and integrity guarantees. She is a recipient of a Sloan fellowship, NSF Career Award, IEEE TCDE Rising Star Award, VMWare Early Career Faculty Award, the inaugural Google ML and Systems Junior Faculty Award as well as the ACM SIGOPS Dennis Ritchie Doctoral Dissertation Award.
Dr. Erich Haratsch, Marvell, “Data Storage Innovations for Scalable AI Infrastructure”
Abstract: The exponential growth of AI model complexity and data volumes is reshaping the architecture of modern data centers. This session explores how innovations in storage technology—particularly SSDs—are enabling scalable, high-performance AI infrastructure. We examine the evolving storage demands across AI workflows, from training to inference, and highlight architectural considerations including memory and storage tiering, local and remote topologies, access path optimizations, and emerging SSD design strategies. Attendees will gain insights into how advanced data storage solutions are not only improving efficiency but also unlocking the capacity to train and deploy increasingly sophisticated AI models—driving the next wave of AI capabilities.
Bio: Erich Haratsch is the Senior Director of Architecture at Marvell, where he leads the architecture definition of SSD and storage controllers. Before joining Marvell, he worked at Seagate and LSI, focusing on SSD controllers. Earlier in his career, he contributed to multiple generations of HDD controllers at LSI and Agere Systems. Erich began his career at AT&T and Lucent Bell Labs, working on Gigabit Ethernet over copper, optical communications, and the MPEG-4 video standard. He is the author of over 40 peer-reviewed journal and conference papers and holds more than 200 U.S. patents. A Senior Member of IEEE, Erich earned his MS and PhD degrees from the Technical University of Munich, Germany.
Prof. Sagar Karandikar, UC Berkeley, “Agile Hardware/Software Co-Design for Hyperscale Cloud Systems”
Abstract: Global reliance on cloud services, powered by transformative technologies such as generative AI, machine learning, and big-data analytics, is driving exponential growth in demand for hyperscale cloud compute infrastructure. Catching up with exponential demand requires developing new hardware rapidly and with confidence that performance/efficiency gains will compound in the context of a complete system.
This talk will cover two themes: (1) Developing agile, end-to-end HW/SW co-design tools (FireSim, Chipyard) that challenge the status quo in hardware design across system scale. (2) Leveraging these tools and hyperscale datacenter fleet profiling insights to architect/implement state-of-the-art domain-specific hardware to address key inefficiencies in hyperscale systems.
Bio: Sagar Karandikar is an Assistant Professor of Electrical Engineering and Computer Sciences (EECS) at UC Berkeley and the Jean and Hing Wong Foundation Faculty Fellow at UC Berkeley. His research focuses on hardware/software co-design for hyperscale cloud data centers that power critical and rapidly evolving applications including AI/ML, scalable data processing, web services, and more. His group works on areas including hardware accelerator and server system-on-chip design, full-stack (HW + SW) system optimization and profiling, and agile, open-source, AI/ML-infused hardware development methodologies.
His work has received several recognitions, including an ISCA@50 25-year Retrospective selection, an IEEE Micro Top Picks selection, an IEEE Micro Top Picks honorable mention, a MICRO Distinguished Artifact Award, an ISCA Distinguished Artifact Award, and more. His work is also widely used in the community. For example, FireSim has been used (not only cited) in over 85 peer-reviewed publications from first authors at over 35 institutions, in the development of commercially available chips, and as a standard host platform for DARPA/IARPA programs.
He received the 2025 ACM SIGARCH/IEEE CS TCCA Outstanding Dissertation Award, a Google ML and Systems Junior Faculty Award, the David J. Sakrison Memorial Prize for outstanding graduate research, the UC Berkeley Outstanding Graduate Student Instructor Award, and was selected as a DARPA Riser. More info: https://sagark.org
Prof. David Patterson, UC Berkeley and Google, the Pardee Professor of Computer Science, Emeritus, "How to Give AI a Bad Carbon Footprint"
Abstract: Dave will give tongue-in-cheek advice on how to make AI’s carbon footprint worse, and then how to make it better. He will dispel common fallacies about AI’s emissions. Learn key factors influencing AI's carbon footprint and gain valuable perspectives on building more sustainable AI systems.
Bio: Dave Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, which he joined after graduating from UCLA in 1976.
Dave's research style is to identify critical questions for the IT industry and gather inter-disciplinary groups of faculty and graduate students to answer them. The answer is typically embodied in demonstration systems, and these demonstration systems are later mirrored in commercial products. In addition to research impact, these projects train leaders of our field. The best known projects were Reduced Instruction Set Computers (RISC), Redundant Array of Inexpensive Disks (RAID), and Networks of Workstations (NOW), each of which helped lead to billion-dollar industries
A measure of the success of projects is the list of awards won by Patterson and as his teammates: the ACM A.M. Turing Award, the C & C Prize, the IEEE von Neumann Medal, the IEEE Johnson Storage Award, the SIGMOD Test of Time award, the ACM-IEEE Eckert-Mauchly Award, and the Katayanagi Prize. He was also elected to both AAAS societies, the National Academy of Engineering, the National Academy of Sciences, the Silicon Valley Engineering Hall of Fame, and to be a Fellow of the Computer History Museum. The full list includes about 40 awards for research, teaching, and service.
In his spare time, he coauthored seven books—including two with John Hennessy, who is past President of Stanford University and with whom he shared the Turing Award—Patterson also served as Chair of the Computer Science Division at UC Berkeley, Chair of the Computing Research Association, and President of ACM. He is currently Vice-Chair of the Board of Directors of the RISC-V Foundation.
Prof. Sophia Shao, UC Berkeley, “From Algorithms to Silicon: Accelerating Full-Stack Co-Design for the AI Era”
Prof. Ion Stoica, UC Berkeley, the Xu Bao Chancellor's Chair Professor, "An AI Stack: from Scaling AI Workloads to Evaluating LLMs"
Abstract: Large language models (LLMs) have taken the world by storm, enabling new applications, intensifying GPU shortages, and raising concerns about the accuracy of their outputs. In this talk, I will present several projects I have worked on to address these challenges. Specifically, I will focus on Ray, a distributed framework for scaling AI workloads, vLLM and SGLang, two high-throughput inference engines for LLMs, and LMArena, a platform for accurate LLM benchmarking. I will conclude with key lessons learned and outline directions for future research.
Bio: Ion Stoica is a Professor in the EECS Department and holds the Xu Bao Chancellor Chair at the University of California at Berkeley, the Director of Sky Computing Lab, and the Executive Chairman of Databricks and Anyscale. He is currently doing research on AI systems and cloud computing, and his work includes numerous open-source projects such as SkyPilot, vLLM, ChatBot Arena , Ray and Apache Spark. He is a Member of National Academy of Engineering, an Honorary Member of the Romanian Academy and an ACM Fellow. He also co-founded four companies, LMArena (2025), Anyscale (2019), Databricks (2013) and Conviva (2006).
Ralph Wittig, Head of Research & Advanced Development, AMD
Abstract: Ralph will discuss how AMD is evolving the landscape of artificial intelligence and high-performance computing, focusing on innovations in chiplet architectures, programmability for scale and AI-based code generation for AMD GPUs and AI PCs. This talk will introduce challenges and opportunities in programming, resource allocation, and hardware design for next-generation AI workloads. The talk sets the stage for a deep dive into chiplet-based GPU architectures, spatially-aware programming, advanced optimization techniques, communication collectives and AI-driven programming that enable efficient computation and innovation at scale.
Bio: Ralph Wittig leads AMD’s Research and Advanced Development organization, driving the company’s long-range technology strategy and innovation agenda. With over 25 years at AMD, he has helped architect many of the company’s most advanced product families, including Instinct™, EPYC™, Versal™, and Ryzen™. Ralph’s interests span computer architecture, AI accelerators, compilers, programming languages, runtime environments, advanced packaging, and system co-design. Known for his collaborative approach and passion for exploration, he loves to push the boundaries of computing—advancing breakthroughs that shape the future of performance, efficiency, and intelligent systems.
Dr. Liguang Xie, ByteDance, “Unifying Compute and Data for Generative AI: AIBrix, DPUs, and the Future of GenAI Inference”
Bio: Liguang is an Engineering Director of Global Compute Infrastructure at ByteDance, overseeing multiple teams including DPU and inference Infrastructure, and supporting ByteDance's global business across the U.S., Europe, and Asia Pacific. He is a passionate open-source contributor focused on cloud-native AI and public cloud infrastructure, and a co-creator of the AIBrix open-source project. Prior to ByteDance, Liguang was an Engineering Manager at Anyscale, where he led core development of Ray Core and LLM performance for the Ray open-source project. Liguang holds a Ph.D. in Computer Engineering from Virginia Tech and is a recipient of the IEEE INFOCOM 2023 Test of Time Award.
Testimonials from Previous Workshops
Professor David Patterson, the Pardee Professor of Computer Science, UC Berkeley, “I saw strong participation at the Cloud Workshop, with some high energy and enthusiasm; and I was delighted to see industry engineers bring and describe actual hardware, representing some of the newest innovations in the data center.”
Professor Christos Kozyrakis, Professor of Electrical Engineering & Computer Science, Stanford University, “As a starting point, I think of these IAP workshops an intersection of industry’s newest solutions in hardware with academic research in computer architecture; but more so, these workshops additionally cover new subsystems and applications, and in a smaller venue where it is easy to discuss ideas and cross-cutting approaches with colleagues.”
Professor Hakim Weatherspoon, Professor of Computer Science, Cornell University, “I have participated in three IAP Workshops since the first one at Cornell in 2013 and it is great to see that the IAP premise is a success now as it was then, bringing together industry and academia in a focused all-day exchange of ideas. It was a fantastic experience and I look forward to the next one!”
Dr. Carole-Jean Wu, Research Scientist, AI Infrastructure, Facebook Research, and Professor of CSE, Arizona State University, “IAP Workshops provide valuable interactions among faculty, students and industry. The smaller venue and the poster session foster an interactive environment for in-depth discussions and spark new collaborative opportunities. Thank you for organizing this wonderful event! It was very well run.”
Dr. Pankaj Mehra, VP Product Planning, Samsung (currently Professor at Ohio State University and Founder at Elephance Memory), "Terrifically organized Workshops that give all parties -- students, faculty, industry -- valuable insights to take back."
AGENDA – Please see the Speaker Abstracts and Bios below, along with Testimonials from previous Workshops.
8:30-8:55 – Badge Pick-up – Coffee/Tea and Breakfast Food/Snacks
8:55-9:00 – Welcome – Prof. Sagar Karandikar, UC Berkeley
9:00-9:45 – KEYNOTE: Prof. Dave Patterson, UC Berkeley and Google, the Pardee Professor of Computer Science, Emeritus, "How to Give AI a Bad Carbon Footprint"
9:45-10:15 – Dr. Bilge Acun, Research Scientist, FAIR / Meta Superintelligence Labs, “CATransformers: Carbon Aware Transformers Through Joint Model-Hardware Optimization”
10:15-10:45 – Ralph Wittig, Head of Research & Advanced Development, AMD, "Accelerating the Future: AI, Compute and Innovation at Scale"
10:45-11:15 – Prof. Sagar Karandikar, UC Berkeley, “Agile Hardware/Software Co-Design for Hyperscale Cloud Systems”
11:15-11:30 – Lightning Session for Student Posters
11:30-12:30 – Lunch and Poster Viewing
12:30-1:15 – KEYNOTE: Prof. Ion Stoica, UC Berkeley, the Xu Bao Chancellor's Chair Professor, "An AI Stack: from Scaling AI Workloads to Evaluating LLMs"
1:15-1:45 – Dr. Erich Haratsch, Senior Director of Architecture, Marvell, “Data Storage Innovations for Scalable AI Infrastructure”
1:45-2:15 – Prof. Sophia Shao, UC Berkeley, “From Algorithms to Silicon: Accelerating Full-Stack Co-Design for the AI Era”
2:15-2:45 – Dr. Liguang Xie, Engineering Director of Global Compute Infrastructure, ByteDance, “Unifying Compute and Data for Generative AI: AIBrix, DPUs, and the Future of GenAI Inference”
2:45-3:15 – Prof. Natacha Crooks, UC Berkeley, “Supporting Our AI Overlords: Redesigning Data Systems to be Agent-First”
3:15-4:00 - Best Poster Award and Networking Reception
ABSTRACTS and BIOS (alphabetical order by last name)
Dr. Bilge Acun, FAIR @ Meta, “CATransformers: Carbon Aware Transformers Through Joint Model-Hardware Optimization”
Abstract: Machine learning solutions are rapidly adopted to enable a variety of key use cases, from conversational AI assistants to scientific discovery. This growing adoption is expected to increase the associated lifecycle carbon footprint, including both \emph{operational carbon} from training and inference and \emph{embodied carbon} from AI hardware manufacturing. We introduce \ourframework -- the first carbon-aware co-optimization framework for Transformer-based models and hardware accelerators. By integrating both operational and embodied carbon into early-stage design space exploration, \ourframework enables sustainability-driven model architecture and hardware accelerator co-design that reveals fundamentally different trade-offs than latency- or energy-centric approaches. Evaluated across a range of Transformer models, \ourframework consistently demonstrates the potential to reduce total carbon emissions -- by up to 30\% -- while maintaining accuracy and latency. We further highlight its extensibility through a focused case study on multi-modal models. Our results emphasize the need for holistic optimization methods that prioritize carbon efficiency without compromising model capability and execution time performance. The source code of \ourframework is available at {\small{\href{this https URL}{\texttt{this https URL}}}}.
Bio: Bilge Acun is a Research Scientist at FAIR / Meta Superintelligence Labs. She is working on making large scale machine learning systems more efficient, high performance and sustainable through algorithmic and system optimizations. She received her Ph.D. degree in 2017 at the Department of Computer Science at University of Illinois at Urbana-Champaign. Her dissertation was awarded 2018 ACM SigHPC Dissertation Award Honorable Mention. Before joining FAIR, she worked at the IBM Thomas J. Watson Research Center as a Research Staff Member.
Prof. Natacha Crooks, UC Berkeley, “Supporting Our AI Overlords: Redesigning Data Systems to be Agent-First”
Abstract: Large Language Model (LLM) agents, acting on their users' behalf to manipulate and analyze data, are likely to become the dominant workload for data systems in the future. When working with data, agents employ a high-throughput process of exploration and solution formulation for the given task, one we call agentic speculation. The sheer volume and inefficiencies of agentic speculation can pose challenges for present-day data systems. I will argue that data systems need to adapt to more natively support agentic workloads. I will take advantage of the characteristics of agentic speculation that we identify, i.e., scale, heterogeneity, redundancy, and steerability - to outline a number of new research opportunities for a new agent-first data systems architecture, ranging from new query interfaces, to new query processing techniques, to new agentic memory store
Bio: Natacha Crooks is an Assistant Professor at UC Berkeley. She works at the intersection of distributed systems and databases. Most recently, she is focused on developing scalable database and storage systems with strong scaling and integrity guarantees. She is a recipient of a Sloan fellowship, NSF Career Award, IEEE TCDE Rising Star Award, VMWare Early Career Faculty Award, the inaugural Google ML and Systems Junior Faculty Award as well as the ACM SIGOPS Dennis Ritchie Doctoral Dissertation Award.
Dr. Erich Haratsch, Marvell, “Data Storage Innovations for Scalable AI Infrastructure”
Abstract: The exponential growth of AI model complexity and data volumes is reshaping the architecture of modern data centers. This session explores how innovations in storage technology—particularly SSDs—are enabling scalable, high-performance AI infrastructure. We examine the evolving storage demands across AI workflows, from training to inference, and highlight architectural considerations including memory and storage tiering, local and remote topologies, access path optimizations, and emerging SSD design strategies. Attendees will gain insights into how advanced data storage solutions are not only improving efficiency but also unlocking the capacity to train and deploy increasingly sophisticated AI models—driving the next wave of AI capabilities.
Bio: Erich Haratsch is the Senior Director of Architecture at Marvell, where he leads the architecture definition of SSD and storage controllers. Before joining Marvell, he worked at Seagate and LSI, focusing on SSD controllers. Earlier in his career, he contributed to multiple generations of HDD controllers at LSI and Agere Systems. Erich began his career at AT&T and Lucent Bell Labs, working on Gigabit Ethernet over copper, optical communications, and the MPEG-4 video standard. He is the author of over 40 peer-reviewed journal and conference papers and holds more than 200 U.S. patents. A Senior Member of IEEE, Erich earned his MS and PhD degrees from the Technical University of Munich, Germany.
Prof. Sagar Karandikar, UC Berkeley, “Agile Hardware/Software Co-Design for Hyperscale Cloud Systems”
Abstract: Global reliance on cloud services, powered by transformative technologies such as generative AI, machine learning, and big-data analytics, is driving exponential growth in demand for hyperscale cloud compute infrastructure. Catching up with exponential demand requires developing new hardware rapidly and with confidence that performance/efficiency gains will compound in the context of a complete system.
This talk will cover two themes: (1) Developing agile, end-to-end HW/SW co-design tools (FireSim, Chipyard) that challenge the status quo in hardware design across system scale. (2) Leveraging these tools and hyperscale datacenter fleet profiling insights to architect/implement state-of-the-art domain-specific hardware to address key inefficiencies in hyperscale systems.
Bio: Sagar Karandikar is an Assistant Professor of Electrical Engineering and Computer Sciences (EECS) at UC Berkeley and the Jean and Hing Wong Foundation Faculty Fellow at UC Berkeley. His research focuses on hardware/software co-design for hyperscale cloud data centers that power critical and rapidly evolving applications including AI/ML, scalable data processing, web services, and more. His group works on areas including hardware accelerator and server system-on-chip design, full-stack (HW + SW) system optimization and profiling, and agile, open-source, AI/ML-infused hardware development methodologies.
His work has received several recognitions, including an ISCA@50 25-year Retrospective selection, an IEEE Micro Top Picks selection, an IEEE Micro Top Picks honorable mention, a MICRO Distinguished Artifact Award, an ISCA Distinguished Artifact Award, and more. His work is also widely used in the community. For example, FireSim has been used (not only cited) in over 85 peer-reviewed publications from first authors at over 35 institutions, in the development of commercially available chips, and as a standard host platform for DARPA/IARPA programs.
He received the 2025 ACM SIGARCH/IEEE CS TCCA Outstanding Dissertation Award, a Google ML and Systems Junior Faculty Award, the David J. Sakrison Memorial Prize for outstanding graduate research, the UC Berkeley Outstanding Graduate Student Instructor Award, and was selected as a DARPA Riser. More info: https://sagark.org
Prof. David Patterson, UC Berkeley and Google, the Pardee Professor of Computer Science, Emeritus, "How to Give AI a Bad Carbon Footprint"
Abstract: Dave will give tongue-in-cheek advice on how to make AI’s carbon footprint worse, and then how to make it better. He will dispel common fallacies about AI’s emissions. Learn key factors influencing AI's carbon footprint and gain valuable perspectives on building more sustainable AI systems.
Bio: Dave Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, which he joined after graduating from UCLA in 1976.
Dave's research style is to identify critical questions for the IT industry and gather inter-disciplinary groups of faculty and graduate students to answer them. The answer is typically embodied in demonstration systems, and these demonstration systems are later mirrored in commercial products. In addition to research impact, these projects train leaders of our field. The best known projects were Reduced Instruction Set Computers (RISC), Redundant Array of Inexpensive Disks (RAID), and Networks of Workstations (NOW), each of which helped lead to billion-dollar industries
A measure of the success of projects is the list of awards won by Patterson and as his teammates: the ACM A.M. Turing Award, the C & C Prize, the IEEE von Neumann Medal, the IEEE Johnson Storage Award, the SIGMOD Test of Time award, the ACM-IEEE Eckert-Mauchly Award, and the Katayanagi Prize. He was also elected to both AAAS societies, the National Academy of Engineering, the National Academy of Sciences, the Silicon Valley Engineering Hall of Fame, and to be a Fellow of the Computer History Museum. The full list includes about 40 awards for research, teaching, and service.
In his spare time, he coauthored seven books—including two with John Hennessy, who is past President of Stanford University and with whom he shared the Turing Award—Patterson also served as Chair of the Computer Science Division at UC Berkeley, Chair of the Computing Research Association, and President of ACM. He is currently Vice-Chair of the Board of Directors of the RISC-V Foundation.
Prof. Sophia Shao, UC Berkeley, “From Algorithms to Silicon: Accelerating Full-Stack Co-Design for the AI Era”
Prof. Ion Stoica, UC Berkeley, the Xu Bao Chancellor's Chair Professor, "An AI Stack: from Scaling AI Workloads to Evaluating LLMs"
Abstract: Large language models (LLMs) have taken the world by storm, enabling new applications, intensifying GPU shortages, and raising concerns about the accuracy of their outputs. In this talk, I will present several projects I have worked on to address these challenges. Specifically, I will focus on Ray, a distributed framework for scaling AI workloads, vLLM and SGLang, two high-throughput inference engines for LLMs, and LMArena, a platform for accurate LLM benchmarking. I will conclude with key lessons learned and outline directions for future research.
Bio: Ion Stoica is a Professor in the EECS Department and holds the Xu Bao Chancellor Chair at the University of California at Berkeley, the Director of Sky Computing Lab, and the Executive Chairman of Databricks and Anyscale. He is currently doing research on AI systems and cloud computing, and his work includes numerous open-source projects such as SkyPilot, vLLM, ChatBot Arena , Ray and Apache Spark. He is a Member of National Academy of Engineering, an Honorary Member of the Romanian Academy and an ACM Fellow. He also co-founded four companies, LMArena (2025), Anyscale (2019), Databricks (2013) and Conviva (2006).
Ralph Wittig, Head of Research & Advanced Development, AMD
Abstract: Ralph will discuss how AMD is evolving the landscape of artificial intelligence and high-performance computing, focusing on innovations in chiplet architectures, programmability for scale and AI-based code generation for AMD GPUs and AI PCs. This talk will introduce challenges and opportunities in programming, resource allocation, and hardware design for next-generation AI workloads. The talk sets the stage for a deep dive into chiplet-based GPU architectures, spatially-aware programming, advanced optimization techniques, communication collectives and AI-driven programming that enable efficient computation and innovation at scale.
Bio: Ralph Wittig leads AMD’s Research and Advanced Development organization, driving the company’s long-range technology strategy and innovation agenda. With over 25 years at AMD, he has helped architect many of the company’s most advanced product families, including Instinct™, EPYC™, Versal™, and Ryzen™. Ralph’s interests span computer architecture, AI accelerators, compilers, programming languages, runtime environments, advanced packaging, and system co-design. Known for his collaborative approach and passion for exploration, he loves to push the boundaries of computing—advancing breakthroughs that shape the future of performance, efficiency, and intelligent systems.
Dr. Liguang Xie, ByteDance, “Unifying Compute and Data for Generative AI: AIBrix, DPUs, and the Future of GenAI Inference”
Bio: Liguang is an Engineering Director of Global Compute Infrastructure at ByteDance, overseeing multiple teams including DPU and inference Infrastructure, and supporting ByteDance's global business across the U.S., Europe, and Asia Pacific. He is a passionate open-source contributor focused on cloud-native AI and public cloud infrastructure, and a co-creator of the AIBrix open-source project. Prior to ByteDance, Liguang was an Engineering Manager at Anyscale, where he led core development of Ray Core and LLM performance for the Ray open-source project. Liguang holds a Ph.D. in Computer Engineering from Virginia Tech and is a recipient of the IEEE INFOCOM 2023 Test of Time Award.
Testimonials from Previous Workshops
Professor David Patterson, the Pardee Professor of Computer Science, UC Berkeley, “I saw strong participation at the Cloud Workshop, with some high energy and enthusiasm; and I was delighted to see industry engineers bring and describe actual hardware, representing some of the newest innovations in the data center.”
Professor Christos Kozyrakis, Professor of Electrical Engineering & Computer Science, Stanford University, “As a starting point, I think of these IAP workshops an intersection of industry’s newest solutions in hardware with academic research in computer architecture; but more so, these workshops additionally cover new subsystems and applications, and in a smaller venue where it is easy to discuss ideas and cross-cutting approaches with colleagues.”
Professor Hakim Weatherspoon, Professor of Computer Science, Cornell University, “I have participated in three IAP Workshops since the first one at Cornell in 2013 and it is great to see that the IAP premise is a success now as it was then, bringing together industry and academia in a focused all-day exchange of ideas. It was a fantastic experience and I look forward to the next one!”
Dr. Carole-Jean Wu, Research Scientist, AI Infrastructure, Facebook Research, and Professor of CSE, Arizona State University, “IAP Workshops provide valuable interactions among faculty, students and industry. The smaller venue and the poster session foster an interactive environment for in-depth discussions and spark new collaborative opportunities. Thank you for organizing this wonderful event! It was very well run.”
Dr. Pankaj Mehra, VP Product Planning, Samsung (currently Professor at Ohio State University and Founder at Elephance Memory), "Terrifically organized Workshops that give all parties -- students, faculty, industry -- valuable insights to take back."