The IAP-UCLA Workshop on Efficient AI Inference is scheduled for Friday, November 13, 2026 on the UCLA Campus.
Time: 8:30am - 4:00pm PST
Venue: Mong Auditorium, Engineering VI, 404 Westwood Blvd, Los Angeles, CA
The Workshop is co-organized by Prof. Yizhou Sun and the IAP in collaboration with the CS Department and the Samueli School of Engineering.
Time: 8:30am - 4:00pm PST
Venue: Mong Auditorium, Engineering VI, 404 Westwood Blvd, Los Angeles, CA
The Workshop is co-organized by Prof. Yizhou Sun and the IAP in collaboration with the CS Department and the Samueli School of Engineering.
Participants will include faculty, postdocs, students, industry scientists and engineers. See the Speaker Abstracts and Bios below, along with Testimonials from previous Workshops.
ABSTRACTS AND BIOS
KEYNOTE: Prof. Jason Cong, UCLA, "Efficient General Intelligence: From Model Innovation to Heterogeneous Inference"
Abstract: As we move toward increasingly general and capable AI systems, efficiency is becoming as important as intelligence itself: One must achieve greater reasoning and learning capabilities under practical constraints of computation, memory, energy, latency, and cost.
In this talk, I will discuss our recent research toward Efficient General Intelligence (EGI) from two complementary directions. First, I will present new approaches to AI model innovation that aim to achieve greater intelligence with fewer computational resources, such as a new hierarchical memory transformer that leverages long-term memory to substantially improve the efficiency of long-context inference, as well as application-specific small models customized through agentic reinforcement learning that can match or even outperform frontier large language models (LLMs) on targeted tasks. Second, I will discuss our work on efficient heterogeneous AI inference, including lookup-table (LUT)-based LLMs with efficient hardware acceleration, heterogeneous inference with GPU–FPGA co-design for speculative decoding, and fine-grained disaggregated inference architectures. Together, these efforts point to a broader principle: efficiency should be viewed not merely as an implementation constraint, but as a fundamental dimension of intelligence. Achieving EGI will require innovations across the AI stack—from models and algorithms to heterogeneous computing architectures—so that we can deliver increasingly capable AI with much greater efficiency, scalability, and accessibility.
Bio: Jason Cong is the Volgenau Chair for Engineering Excellence Professor at the UCLA Computer Science Department (and a former department chair), with joint appointment from the Electrical and Computer Engineering Department. He is the director of Center for Domain-Specific Computing (CDSC) and the director of VLSI Architecture, Synthesis, and Technology (VAST) Laboratory. Dr. Cong’s research interests include novel architectures and compilation for customizable computing, synthesis of VLSI circuits and systems, and quantum computing. He has over 600 publications in these areas, including 20 best paper awards, and 6 papers in the FPGA and Reconfigurable Computing Hall of Fame. He and his former students co-founded AutoESL, which developed the most widely used high-level synthesis tool for FPGAs (renamed to Vivado HLS and Vitis HLS after Xilinx’s acquisition). He is member of the National Academy of Engineering, the American Academy of Arts and Sciences, and a Fellow of ACM, IEEE, and the National Academy of Inventors. He is recipient of the the IEEE Robert N. Noyce Medal “for fundamental contributions to electronic design automation and FPGA design methods” in 2022, the Phil Kaufman Award, the highest recognition in EDA, in 2024, and the ACM Chuck Thacker Breakthrough Award in 2025 “for fundamental contributions to the design and automation of field-programmable systems and customizable computing.”
TESTIMONIALS FROM PREVIOUS WORKSHOPS
Professor David Patterson, the Pardee Professor of Computer Science, UC Berkeley, Turing Award Laureate, “I saw strong participation at the Cloud Workshop, with some high energy and enthusiasm; and I was delighted to see industry engineers bring and describe actual hardware, representing some of the newest innovations in the data center.”
Professor Christos Kozyrakis, the Leonard Bosack and Sandy K. Lerner Professor of Engineering, Stanford University, Researcher at Nvidia Research, Maurice Wilkes Award Winner, “As a starting point, I think of these IAP workshops an intersection of industry’s newest solutions in hardware with academic research in computer architecture; but more so, these workshops additionally cover new subsystems and applications, and in a smaller venue where it is easy to discuss ideas and cross-cutting approaches with colleagues.”
Professor Hakim Weatherspoon, Professor of Computer Science, Cornell University, Sloan and Kavli Fellow, “I have participated in six IAP Workshops since the first one at Cornell in 2013 and it is great to see that the IAP premise is a success now as it was then, bringing together industry and academia in a focused all-day exchange of ideas. It was a fantastic experience and I look forward to the next one!”
Dr. Carole-Jean Wu, Director of AI Research at Meta, Maurice Wilkes Award Winner, “IAP Workshops provide valuable interactions among faculty, students and industry. The smaller venue and the poster session foster an interactive environment for in-depth discussions and spark new collaborative opportunities. Thank you for organizing this wonderful event! It was very well run.”
Professor Ana Klimovic, ETH Zurich, EuroSys Jochen Liedtke Young Researcher Award Winner, “I attended three IAP workshops as a PhD student at Stanford, and I am consistently impressed by the quality of the talks and the breadth of the topics covered. These workshops bring top-tier industry and academia together to discuss cutting-edge research challenges. It is a great opportunity to exchange ideas and get inspiration for new research opportunities."
Nathan Pemberton, PhD student, UC Berkeley (earned his doctorate in 2022, currently Applied Scientist at AWS), "IAP workshops provide a valuable chance to explore emerging research topics with a focused group of participants, and without all the time/effort of a full-scale conference. Instead of rushing from talk to talk, you can slow down and dive deep into a few topics with experts in the field."
Dr. Pankaj Mehra, VP Product Planning, Samsung (currently Professor at Ohio State University and Founder at Elephance Memory), "Terrifically organized Workshops that give all parties -- students, faculty, industry -- valuable insights to take back."
ABSTRACTS AND BIOS
KEYNOTE: Prof. Jason Cong, UCLA, "Efficient General Intelligence: From Model Innovation to Heterogeneous Inference"
Abstract: As we move toward increasingly general and capable AI systems, efficiency is becoming as important as intelligence itself: One must achieve greater reasoning and learning capabilities under practical constraints of computation, memory, energy, latency, and cost.
In this talk, I will discuss our recent research toward Efficient General Intelligence (EGI) from two complementary directions. First, I will present new approaches to AI model innovation that aim to achieve greater intelligence with fewer computational resources, such as a new hierarchical memory transformer that leverages long-term memory to substantially improve the efficiency of long-context inference, as well as application-specific small models customized through agentic reinforcement learning that can match or even outperform frontier large language models (LLMs) on targeted tasks. Second, I will discuss our work on efficient heterogeneous AI inference, including lookup-table (LUT)-based LLMs with efficient hardware acceleration, heterogeneous inference with GPU–FPGA co-design for speculative decoding, and fine-grained disaggregated inference architectures. Together, these efforts point to a broader principle: efficiency should be viewed not merely as an implementation constraint, but as a fundamental dimension of intelligence. Achieving EGI will require innovations across the AI stack—from models and algorithms to heterogeneous computing architectures—so that we can deliver increasingly capable AI with much greater efficiency, scalability, and accessibility.
Bio: Jason Cong is the Volgenau Chair for Engineering Excellence Professor at the UCLA Computer Science Department (and a former department chair), with joint appointment from the Electrical and Computer Engineering Department. He is the director of Center for Domain-Specific Computing (CDSC) and the director of VLSI Architecture, Synthesis, and Technology (VAST) Laboratory. Dr. Cong’s research interests include novel architectures and compilation for customizable computing, synthesis of VLSI circuits and systems, and quantum computing. He has over 600 publications in these areas, including 20 best paper awards, and 6 papers in the FPGA and Reconfigurable Computing Hall of Fame. He and his former students co-founded AutoESL, which developed the most widely used high-level synthesis tool for FPGAs (renamed to Vivado HLS and Vitis HLS after Xilinx’s acquisition). He is member of the National Academy of Engineering, the American Academy of Arts and Sciences, and a Fellow of ACM, IEEE, and the National Academy of Inventors. He is recipient of the the IEEE Robert N. Noyce Medal “for fundamental contributions to electronic design automation and FPGA design methods” in 2022, the Phil Kaufman Award, the highest recognition in EDA, in 2024, and the ACM Chuck Thacker Breakthrough Award in 2025 “for fundamental contributions to the design and automation of field-programmable systems and customizable computing.”
TESTIMONIALS FROM PREVIOUS WORKSHOPS
Professor David Patterson, the Pardee Professor of Computer Science, UC Berkeley, Turing Award Laureate, “I saw strong participation at the Cloud Workshop, with some high energy and enthusiasm; and I was delighted to see industry engineers bring and describe actual hardware, representing some of the newest innovations in the data center.”
Professor Christos Kozyrakis, the Leonard Bosack and Sandy K. Lerner Professor of Engineering, Stanford University, Researcher at Nvidia Research, Maurice Wilkes Award Winner, “As a starting point, I think of these IAP workshops an intersection of industry’s newest solutions in hardware with academic research in computer architecture; but more so, these workshops additionally cover new subsystems and applications, and in a smaller venue where it is easy to discuss ideas and cross-cutting approaches with colleagues.”
Professor Hakim Weatherspoon, Professor of Computer Science, Cornell University, Sloan and Kavli Fellow, “I have participated in six IAP Workshops since the first one at Cornell in 2013 and it is great to see that the IAP premise is a success now as it was then, bringing together industry and academia in a focused all-day exchange of ideas. It was a fantastic experience and I look forward to the next one!”
Dr. Carole-Jean Wu, Director of AI Research at Meta, Maurice Wilkes Award Winner, “IAP Workshops provide valuable interactions among faculty, students and industry. The smaller venue and the poster session foster an interactive environment for in-depth discussions and spark new collaborative opportunities. Thank you for organizing this wonderful event! It was very well run.”
Professor Ana Klimovic, ETH Zurich, EuroSys Jochen Liedtke Young Researcher Award Winner, “I attended three IAP workshops as a PhD student at Stanford, and I am consistently impressed by the quality of the talks and the breadth of the topics covered. These workshops bring top-tier industry and academia together to discuss cutting-edge research challenges. It is a great opportunity to exchange ideas and get inspiration for new research opportunities."
Nathan Pemberton, PhD student, UC Berkeley (earned his doctorate in 2022, currently Applied Scientist at AWS), "IAP workshops provide a valuable chance to explore emerging research topics with a focused group of participants, and without all the time/effort of a full-scale conference. Instead of rushing from talk to talk, you can slow down and dive deep into a few topics with experts in the field."
Dr. Pankaj Mehra, VP Product Planning, Samsung (currently Professor at Ohio State University and Founder at Elephance Memory), "Terrifically organized Workshops that give all parties -- students, faculty, industry -- valuable insights to take back."